1. Field of the Disclosure
The present disclosure is generally directed to instruction processing and, more particularly, to instruction operation dispatch in a processing pipeline.
2. Description of the Related Art
In a conventional processing device having multiple execution units, a single dispatch bus typically is used to transfer instruction operations to each of the execution units. As the aggregate number of instruction operations capable of being executed by the multiple execution units often exceeds the dispatch bandwidth of the dispatch bus, the dispatch process often serves as a bottleneck to limit the overall bandwidth of the processing device. Accordingly, an improved dispatch technique would be advantageous.
The use of the same reference symbols in different drawings indicates similar or identical items.